Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1997-12-22
1999-12-28
Hiteshew, Felisa
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438712, H01L 21302
Patent
active
060081317
ABSTRACT:
A method of forming shallow isolation trenches in integrated circuit wafers which prevents wafer damage due to dislocations or the like occurring at sharp corners at the intersection between the sidewalls and bottom of the trench. A trench is formed in the wafer using a series of reactive ion etching steps. The bottom of the trench is then etched using reactive ion etching with etching parameters chosen to produce dry isotropic etching. The dry isotropic etching of the bottom of the trench results in a rounded bottom and sharp corners between the sidewalls and bottom of the trench are avoided.
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Ackerman Stephen B.
Hiteshew Felisa
Prescott Larry J.
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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