Bottom-drain LDMOS power MOSFET structure having a top drain...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S328000, C257S333000, C257S341000, C257S492000, C257SE29261, C257SE29258

Reexamination Certificate

active

07829947

ABSTRACT:
Lateral DMOS devices having improved drain contact structures and methods for making the devices are disclosed. A semiconductor device comprises a semiconductor substrate; an epitaxial layer on top of the substrate; a drift region at a top surface of the epitaxial layer; a source region at a top surface of the epitaxial layer; a channel region between the source and drift regions; a gate positioned over a gate dielectric on top of the channel region; and a drain contact trench that electrically connects the drift layer and substrate. The contact trench includes a trench formed vertically from the drift region, through the epitaxial layer to the substrate and filled with an electrically conductive drain plug; electrically insulating spacers along sidewalls of the trench; and an electrically conductive drain strap on top of the drain contact trench that electrically connects the drain contact trench to the drift region.

REFERENCES:
patent: 5113236 (1992-05-01), Arnold et al.
patent: 5338965 (1994-08-01), Malhi
patent: 5821144 (1998-10-01), D'Anna et al.
patent: 5843820 (1998-12-01), Lu
patent: 5869875 (1999-02-01), Hebert
patent: 6130458 (2000-10-01), Takagi et al.
patent: 6372557 (2002-04-01), Leong
patent: 6791143 (2004-09-01), Baliga
patent: 6800897 (2004-10-01), Baliga
patent: 2001/0038112 (2001-11-01), Gambino et al.
patent: 2006/0054958 (2006-03-01), Weis et al.
patent: 2007/0013008 (2007-01-01), Xu et al.
patent: 2007/0138548 (2007-06-01), Kocon et al.
patent: 2007/0278571 (2007-12-01), Bhalla et al.
patent: 2008/0023785 (2008-01-01), Hebert
patent: 2009/0008691 (2009-01-01), Lee et al.
patent: 2009/0302480 (2009-12-01), Birner et al.
“Comparative Study of Drift Region Designs in RF LDMOSFETs” to G. Cao et al., published in IEEE Electron Devices, Aug. 2004, pp. 1296-1303.
“A 2.45 GHz Power Ld-MOSFET with Reduced source inductance by V-Groove connections” to Ishiwaka O et al—published in International Electron Devices Meeting. Technical Digest, Washington DC, USA, Dec. 1-4, 1985, pp. 166-169.
U.S. Appl. No. 12/981,485, filed Sep. 27, 2010.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Bottom-drain LDMOS power MOSFET structure having a top drain... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bottom-drain LDMOS power MOSFET structure having a top drain..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bottom-drain LDMOS power MOSFET structure having a top drain... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4217765

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.