Bootstrap circuit and integrated memory circuit having the boots

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Signal transmission integrity or spurious noise override

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Details

327383, 327427, 327434, 327589, H03K 1716

Patent

active

057839620

ABSTRACT:
A bootstrap circuit includes a transfer transistor and a driver transistor of the same channel type each having two channel terminals and a gate. A first signal terminal receives a first signal and a second signal terminal receives a second signal. One of the channel terminals of the transfer transistor is connected to the gate of the driver transistor. The other of the channel terminals of the transfer transistor is connected to the first signal terminal. One of the channel terminals of the driver transistor is connected to the second signal terminal. The other of the channel terminals of the driver transistor forms an output of the bootstrap circuit. A configuration generates a third signal and has an output connected to the gate of the transfer transistor. The second signal has an edge extending from a first level to a second level and beginning at a bootstrap time. The first signal has a precharging level between the first level and the second level of the second signal occurring no later than another time being at the latest equal to the bootstrap time. After the other time, the third signal has a first level being equal to or located on the other side of the level of the first signal as seen from the second level of the second signal. Before the other time, the third signal has a second level being on the same side of the precharging level of the first signal as seen from the second level of the second signal.

REFERENCES:
patent: 5548238 (1996-08-01), Zhang et al.
patent: 5621348 (1997-04-01), Furutani et al.
Digital Circuits by William J. Streib, 1990, pp. 272-275.

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