Bootstrap circuit

Electronic digital logic circuitry – Interface – Current driving

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327589, 326119, H03K 1901

Patent

active

055128459

ABSTRACT:
A bootstrap circuit comprising an inverter for inverting an input signal from an input node, a delay stage for delaying the input signal from the input node for a predetermined time period, a first capacitor connected between an output terminal of the inverter and a junction node, a first NMOS transistor for transferring the input signal delayed by the delay stage to the junction node, the first NMOS transistor having a drain connected to an output terminal of the delay stage, a source connected to the junction node and a gate connected to a supply voltage source, a second capacitor connected between an output node and a ground voltage source, and a second NMOS transistor for transferring the input signal inverted by the inverter to the second capacitor connected to the output node in response to a signal charged on the first capacitor. According to the present invention, the bootstrap circuit bootstraps the input signal to a high voltage level at a high speed.

REFERENCES:
patent: 4906056 (1990-03-01), Taniguchi
patent: 5059816 (1991-10-01), Kobatake
patent: 5184035 (1993-02-01), Sugibayashi
patent: 5268600 (1993-12-01), Yeu
patent: 5313107 (1994-05-01), Itoh
patent: 5369320 (1994-11-01), Satani
Ser. No. 08/348,192 date Nov. 29, 1994, Oh.

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