Boosting circuit improved to operate in a wider range of power s

Details Boosting circuit improved to operate in a wider range of power s Boosting circuit improved to operate in a wider range of power s

1993-07-16

1995-04-04

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365149, 36518911, 327530, 327534, 327589, H03K 458

Patent

active

054043298

ABSTRACT:
A boosting circuit is provided applicable in various semiconductor integrated circuits such as a word line boosting circuit in a semiconductor memory. Because a backgate electrode of a PMOS transistor connected between power supply potential and an output node is connected to the output node, the output node is precharged to the Vcc level during a boosting term. Therefore, the boosting condition by a MOS capacitor is alleviated in comparison with a conventional boosting circuit. Proper boosting operation can be carried out even at a lower level of a supplied power supply voltage. Therefore, operable margin of power supply voltage is enlarged.

REFERENCES:
patent: 4398100 (1983-08-01), Tobita et al.
patent: 4716303 (1987-12-01), Mimoto
patent: 4772812 (1988-09-01), Desmarais
patent: 5059816 (1991-10-01), Kobatake
patent: 5185721 (1993-02-01), Love et al.
patent: 5268600 (1993-12-01), Yeu

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