Boosting circuit

Details Boosting circuit Boosting circuit

2000-10-31

2002-01-22

Nguyen, Matthew (Department: 2838)

Electric power conversion systems

Current conversion

With voltage multiplication means

C327S536000

Reexamination Certificate

active

06341077

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a boosting circuit and, more particularly, to a boosting circuit with high efficiency used for a power supply circuit.
2. Description of the Prior Art
Another potential higher as an absolute value than an original potential is often generated from a single power supply. A circuit constituted for this purpose is called a boosting circuit.
Important points for comparing the performances of the boosting circuits are roughly classified as follows.
The first point is boosting ability. This point includes whether the boosting circuit has an ability of sufficiently supplying a higher boosted potential and whether the circuit can supply a sufficient current.
The second point is current consumption. When a current consumption value other than a current value actually consumed as a boosting power supply is large even if a sufficiently boosted potential can be obtained, the boosting circuit is very poor in practicability.
The third point is efficiency. The efficiency includes two meanings; one is a boosted potential with respect to current consumption, which is referred to in the second point, and the other is complexity of elements constituting the circuit. In actually constituting the boosting circuit, it is often formed on a semiconductor substrate. At this time, an arrangement which affects the chip size, such as an arrangement using many elements, is inefficient in cost.
Boosting circuits have been developed from these viewpoints, and a typical example is disclosed in Japanese Unexamined Patent Publication No. 11-110989.
Conventional boosting circuits are variously elaborated to increase the boosting efficiency, and the fundamental principle of their boosting scheme is the form of a boosting circuit shown in
FIGS. 1
,
2
A, and
2
B. This boosting circuit will be exemplified and explained as a prior art.
FIG. 1
is a circuit diagram showing a conventional boosting circuit.
FIGS. 2A and 2B
are waveform charts showing the operation waveforms of the conventional boosting circuit shown in FIG.
1
.
In
FIG. 1
, reference symbols CK
7
-
1
to CK
7
-
4
denote terminals for receiving fundamental clocks for operating the boosting circuit; OUT
7
-
1
, an output terminal for outputting a boosted potential; CP
7
-
1
to CP
7
-
4
, switching control electrostatic capacitive elements for controlling transfer of a boosted potential; CP
7
-
5
to CP
7
-
8
, boosting electrostatic capacitive elements; and N
7
-
1
to N
7
-
8
, Nch transistors.
When power supply potentials represented by waveforms as shown in
FIG. 2A
are input to the contacts CK
7
-
1
to CK
7
-
4
of the circuit shown in
FIG. 1
, the boosting circuit performs boosting operation as represented by the line OUT
7
-
1
shown in FIG.
2
B. On each line in
FIG. 2A
, the lower line represents “L” level, and the upper line represents “H” level.
Boosting operation of the conventional boosting circuit will be explained as follows by a boosting unit made up of the transistors N
7
-
1
and N
7
-
5
, and electrostatic capacitive elements CP
7
-
1
and CP
7
-
5
as an example of a minimum unit.
While the contact CK
7
-
3
is at “L” level, the contact CK
7
-
2
is changed from “L” level to “H” level. At this time, the transistor N
7
-
5
is turned on, and the power supply potential serves as a boosting electrostatic capacitance via the transistor N
7
-
5
to charge the electrostatic capacitive element CP
7
-
5
.
Upon completion of charging, the contact CK
7
-
2
drops to “L” level again, and the transistor N
7
-
5
is turned off. After that, the contact CK
7
-
3
is changed to “H” level to generate a boosted potential of 2×VCC level as far as the parasitic capacitance is ignored.
In this prior art, four boosting units are connected and can output a boosted potential of 5×VCC level.
The boosting circuit using this conventional method has the following drawbacks.
To establish the conventional boosting circuit, electric charges to be boosted must move via transistors. In the above example, boosted charges pass through the transistors N
7
-
5
, N
7
-
6
, N
7
-
7
, and N
7
-
8
to boost the potential stepwise.
To realize this movement, the contacts CK
7
-
3
and CK
7
-
4
are clocked. As a result, electric charges which have been used once for boosting are wasted. For example, electric charges which are stored in the electrostatic capacitive element CP
7
-
5
from the contact CK
7
-
3
in order to boost the potential by the electrostatic capacitive element CP
7
-
5
are inevitably wasted to draw new boosting charges from the power supply.
As the potential is boosted higher and higher, current consumption greatly increases before no sufficiently boosted potential is output.
As another drawback, a boosting electrostatic capacitance is difficult to form when such a boosting circuit is implemented on a semiconductor substrate. The main factor of increasing the semiconductor cost is the area of a portion constituting a circuit. On the assumption that a high potential is output, a high potential is applied across the electrostatic capacitance. To prevent destruction by a high electric field, a film forming the electrostatic capacitive element must be made thick. This inevitably increases the area of the electrostatic capacitive element, resulting in high cost.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above situation, and has as its object to provide a boosting circuit which requires lower current consumption than a conventional boosting circuit.
It is another object of the present invention to provide a boosting circuit which requires a smaller area on a semiconductor substrate than a conventional boosting circuit.
To achieve the above objects, according to the present invention, there is provided a boosting circuit comprises at least two capacitive elements, a first switching element for series-connecting the capacitive elements, second and third switching elements for respectively supplying different power supply potentials to one terminal and the other terminal of each capacitive element, and means for applying a predetermined power supply potential to one capacitive element out of the capacitive elements using the second and third switching elements, series-connecting remaining capacitive elements by the first switching element except for connection with the capacitive element which receives the predetermined power supply potential by the second and third switching elements, and sequentially changing switching states of first, second, and third switching portions to switching states next to corresponding timings.
In the present invention, a boosted potential is obtained by series-connecting boosting electrostatic capacitances. The respective electrostatic capacitances have means for charging the electrostatic capacitances with the power supply potential and switches for series-connecting the electrostatic capacitances. After charging, the electrostatic capacitive elements are series-connected to discharge a boosted potential, and then repetitively charged with the power supply potential. Since electric charges used for boosting are finally extracted as output charges, no electric charges are wasted except for electric charges drawn to a parasitic capacitance.
The electric field applied to each boosting electrostatic capacitive element does not exceed a potential difference between the power supply potential and the ground potential, so that a film forming each boosting electrostatic capacitive element can be set to a small thickness. Particularly when a boosting circuit is to be formed on a semiconductor substrate, the cost can be reduced.
As is apparent from the above aspects, the present invention can reduce current consumption and cost, compared to the prior art in which the boosting circuit is formed on a semiconductor substrate.
As for reduction in current consumption, all the electric charges which are stored in a boosting electrostatic capacitance are finally output in the boosting circuit of the p

Affiliated with

Also associated with

Rating

Boosting circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Boosting circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Boosting circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2872519