Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate
2005-10-11
2005-10-11
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
C365S149000, C327S536000
Reexamination Certificate
active
06954386
ABSTRACT:
A boosted potential generation circuit enables a high-speed operation and even miniaturization in a semiconductor memory even if external power supply voltage is reduced in the semiconductor memory. In the boosted potential generation circuit provided with a capacitor MOS transistor and a transfer MOS transistor and used for a DRAM including memory cells, a gate insulating film of the capacitor MOS transistor is thinner than that of the MOS transistor constituting the memory cell to realize a boosted potential generation circuit which has a small area and a large capacity. In this case, preferably, the gate insulating film of the transfer MOS transistor has a thickness which is not greater than that of the gate insulating film of the capacitor MOS transistor.
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Taiwanese Office Action date Aug. 30, 2004 with Translation.
Korean Office Action dated Apr. 29, 2005 with partial translation.
Kubouchi Shuichi
Mae Kenji
Morino Makoto
Narui Seiji
Elpida Memory Inc.
Hitachi , Ltd.
Hitachi ULSI Systems Co. Ltd.
Hoang Huan
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