Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1984-01-31
1986-07-08
Anagnos, Larry N.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307264, 307269, 307270, 307581, 307562, H03K 5135, H03K 502, H03K 1710, H03K 17687
Patent
active
045995206
ABSTRACT:
An FET double boosted clock driver for producing a clock signal having an amplitude greater than the drain supply voltage. The clock output of a second clock driver is capacitively coupled to the clock output of a first clock driver. The second clock driver boosts the voltage on the source of an enhancement mode (output) FET of the first clock driver. The output FET has its gate connected to a bootstrapped node and its drain connected to a drain voltage source (VDD). A depletion mode FET forms a feedback path between the source of the output node FET and the bootstrapped node. When the bootstrapped node is bootstrapped to VDD+VT, the output FET precharges the clock output to VDD. When the potential of the clock output approaches VDD, the depletion mode FET discharges the bootstrapped node to an input clock. Thus, the potential of the gate of the output FET is clamped to the drain supply voltage when the output is subsequently boosted by the capacitively coupled second clock driver, without adversely effecting the timing and the precharging of the enhancement mode output FET.
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Gabric John A.
O'Neil Edward F.
Anagnos Larry N.
Chadurjian M. F.
International Business Machines - Corporation
Kunkle J. A.
Walter H. J.
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