Bonding-pad structure for integrated circuit and method of fabri

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438597, 438611, 438613, H02L 2144

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06043144&

ABSTRACT:
A bonding-pad structure for integrated circuit is provided. The bonding-pad structure is designed for use in an IC chip constructed on a semiconductor substrate formed with a plurality of circuit components for the purpose of electrical connection to these circuit components. The bonding-pad structure comprises: a first metal-interconnect structure formed over the substrate for electrically interconnecting the various circuit components in the substrate; and a second metal-interconnect structure formed over the substrate within the first metal-interconnect structure, which has an exposed posed surface at a selected location on the bonding side of the IC chip to serve as a bonding pad. The second metal-interconnect structure further includes: a plurality of levels of metallization layers; and a plurality of insulating layers, each being used to isolate each pair of adjoining levels of metallization layers, and each being formed with a contact window therein to electrically connect the two adjoining levels of metallization layers. Moreover each level of metallization layer is smaller in area than the next higher level of metallization layer. This bonding-pad structure can be formed not only within the peripheral area of the IC chip, but also within the internal-circuit area of the same, so that the overall size of the IC chip can be made small even though the IC chip includes a very large number of bonding pads.

REFERENCES:
patent: 5801094 (1998-09-01), Yew et al.
patent: 5851910 (1998-12-01), Hsu et al.

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