Body-tied silicon on insulator semiconductor device and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S349000

Reexamination Certificate

active

06724048

ABSTRACT:

FIELD OF THE INVENTION
The invention related generally to semiconductor devices and more particularly to a body-tied silicon-on-insulator semiconductor device structure and method therefore.
RELATED ART
Silicon on insulator (SOI) technology has been developed to provide a number of advantages over bulk silicon device technologies. As is known, SOI provides improvements in speed and power consumption with respect to previous bulk silicon circuits. Some of the benefits of SOI technology are based on the reduced capacitance at various junctions within semiconductor devices, whereas additional benefits are derived from the floating body itself.
Because the speed with which a floating body device switches may be affected by the previous state of the device, undesirable variations in switching speed may occur. Therefore, although floating body coupling can provide advantages for some portion of the circuit built using SOI technology, in some cases a known body potential for specific devices is desired. As such, knowledge of the potential of the body in a body-tied SOI device ensures that the switching characteristics of the device are reproducible and predictable regardless of the previous state of the device.
In order to allow for body-tied devices within SOI circuits, some device structures have been developed that provide a means for tying the active area of individual devices to a known potential. Examples include T- and H-gate transistor structures where the active area extends beyond the gate structure to provide a means for supplying the desired potential to the active area. The T- and H-gate structures have a significant amount of added gate capacitance and are also problematic in terms of process control issues. As a result of the additional gate capacitance, significant reduction of device speed can occur when T- and H-gate structures are used.
In other prior art techniques for controlling the potential within active areas in SOI devices, a uniform biasing potential may be applied lo all of the devices in a well by linking the bodies of these devices underneath the field oxide. Although this does ensure that the potential within the bodies of the transistors is known, it does not allow devices that have known body potential to coexist with floating body devices. Thus, as floating body devices are desirable for some portions of the circuit and whereas body-tied devices are desirable for other portions of the circuit, such techniques are hindered by undesirable limitations. Furthermore, by linking the bodies of the transistors within the well structure, some of the isolation advantages provided by SOI technology are forfeited. For example, some of the advantages in terms of avoiding latch-up and leakage are diminished.
Therefore, a need exists for a body-tied SOI device that does not suffer from the adverse effects associated with increased gate capacitance and reduced isolation integrity while providing adequate assurance as to active area potential such that the switching characteristics of the device are well understood.


REFERENCES:
patent: 5012311 (1991-04-01), Shirato
patent: 5422505 (1995-06-01), Shirai
patent: 5576573 (1996-11-01), Su
patent: 5918133 (1999-06-01), Gardner
patent: 5960285 (1999-09-01), Hong
patent: 6110783 (2000-08-01), Burr
patent: 6133608 (2000-10-01), Flaker
patent: 0989613 (2000-03-01), None
patent: 2360874 (2001-10-01), None
Mishel Matloubian, “Smart Body Contact for SOI MOSFETs”, pp. 128-129.
Ji-Woon Yang et al., “Hot-Carrier Degradation Behavior in Body-Contacted SOI nMOSFETs”, Proceedings 1997 IEEE International SOI Conference, Oct. 1997, pp. 38-39; and 64Mbit SOI-DRAM Technologies Using Body-Contacted (BC) Structure, pp. 170-171.
W. Chen et al., “Suppression of the SOI Floating-body Effects by Linked-body Device Structure”, 1996 Symposium on VLSI Technology Digest of Technical Papers, Section 10.1, pp. 92-93.
M. Patel et al., “A Novel Body Contact For SIMOX Based SOI MOSFETs”, 1991 Pergamon Press, 1991 Solid-State Electronics, vol. 34,No. 10, pp. 1071-1075.
Stephen C. Kuehne et al., “Deep Sub-Micron SOI MOSFET With Buried Body Strap”, Proceedings Oct. 1996 IEEE International SOI Conference, pp. 96-97.
Won-Gu Kang et al., “Grounded Body SOI(BGSOI) nMOSFET by Wafer Bonding”, Jan. 1995 IEEE Electron Device Letters, vol. 16, No. 1, pp. 1-4.
Wayne E. Bailey, “Silicon-On-Insulator Technology and Devices”, Electronics and Dielectrics and Insulation Divisions Proceedings, vol. 92-13, pp. 64-70.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Body-tied silicon on insulator semiconductor device and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Body-tied silicon on insulator semiconductor device and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Body-tied silicon on insulator semiconductor device and... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3240814

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.