Body-biased pMOS protection against electrostatic discharge

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S360000, C257S363000, C257SE29014

Reexamination Certificate

active

11001899

ABSTRACT:
A protection circuit for protecting an integrated circuit pad201against an ESD pulse, which comprises a discharge circuit having an elongated MOS transistor202(preferably pMOS) in a substrate205(preferably n-type), said discharge circuit operable to discharge the ESD pulse to the pad, to ground203. The embodiment further contains a pump circuit connected to the pad for receiving a portion of the pulse's current; the pump circuit comprises a component221determining the size of this current portion (for example, another transistor, a string of forward diodes, or a reverse Zener diode), wherein the component is connected to ground. A discrete resistor222(for example about 40 to 60Ω) is connected between the pad and the component and is operable to generate a voltage drop (about 0.5 to 1.0 V) by the current portion. A plurality of contacts to the substrate connects to the resistor so that the voltage drop is uniformly impressed on the substrate to ensure uniform turn-on of the elongated transistor for uniform pulse discharge.

REFERENCES:
patent: 5686751 (1997-11-01), Wu
patent: 5744842 (1998-04-01), Ker
patent: 5874763 (1999-02-01), Ham
patent: 5940258 (1999-08-01), Duvvury
patent: 5959488 (1999-09-01), Lin et al.
patent: 2004/0188776 (2004-09-01), Russ et al.
patent: 2005/0083619 (2005-04-01), Steinhoff

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