Board on chip package and method of manufacturing the same

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C438S107000, C438S109000, C438S113000, C438S125000, C257S686000, C257S784000, C257S666000, C257SE21499

Reexamination Certificate

active

07923296

ABSTRACT:
A ball grid array type board on chip package may include an integrated circuit chip having an active surface that supports a plurality of contact pads. An interposer may be adhered to the active surface of the integrated circuit chip. At least one hole may be provided through the interposer to expose the contact pads. A board, which may have a first surface supporting a plurality of metal lines, may have a second surface adhered to the interposer. The board may have an opening through which the contact pads may be exposed. A plurality of bonding wires may connect the contact pads to the metal lines through the opening.

REFERENCES:
patent: 7276786 (2007-10-01), Cho et al.
patent: 7291925 (2007-11-01), Han et al.
patent: 2003/0102546 (2003-06-01), Lee et al.
patent: 2004/0080034 (2004-04-01), Satomi et al.
patent: 2004/0145040 (2004-07-01), Fukuda et al.
patent: 2005/0059188 (2005-03-01), Bolken et al.
patent: 2005/0253241 (2005-11-01), Hall
patent: 2006/0102996 (2006-05-01), Han et al.
patent: 2007/0040261 (2007-02-01), Hetzel et al.
patent: 2001-085609 (2001-03-01), None
patent: 2003-133478 (2003-05-01), None
patent: 1020030045224 (2003-06-01), None

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