Block replacement method in cache only memory architecture multi

Details Block replacement method in cache only memory architecture multi Block replacement method in cache only memory architecture multi

1995-03-16

1997-11-25

Chan, Eddie P.

395468, G06F 1212

Patent

active

056921497

ABSTRACT:
A block replacement method for use in a bus-based cache only memory architecture multiprocessor, is invoked when a block in a local memory of a first processing node in the multiprocessor is to be replaced to make a space for an incoming block supplied via a system bus from a local memory of a second processing node in the multiprocessor, and includes the following steps: (a) if the block of the first processing node is in an invalid state, or in a shared state, overwriting the block of the first processing node with the incoming block from the second processing node; (b) if the block of the first processing node is in an exclusive state, or in a shared owner state, relocating the block of the first processing node to a third processing node in the multiprocessor, selected in accordance with a predetermined priority scheme, and then overwriting the block of the first processing node with the incoming block from the second processing node; and (c) if the third single processing node cannot be determined among the processing nodes in the multiprocessor with the predetermined priority scheme in step (b), swapping the block of the first processing node for the incoming block from the second processing node.

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A. Saulsbury et al., "An Argument for Simple COMA," Proceedings of the First IEEE Symposium on High Performance Computer Architecture, pp. 276-285.

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