Block redundancy implementation in hierarchical rams

Details Block redundancy implementation in hierarchical rams Block redundancy implementation in hierarchical rams

2011-08-23

2011-08-23

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S230060, C365S230030, C365S239000

Reexamination Certificate

active

08004912

ABSTRACT:
The present invention relates to a system and method for providing redundancy in a hierarchically memory, by replacing small blocks in such memory. The present invention provides such redundancy (i.e., replaces such small blocks) by either shifting predecoded lines or using a modified shifting predecoder circuit in the local predecoder block. In one embodiment, the hierarchal memory structure includes at least one active predecoder adapted to be shifted out of use; and at least one redundant predecoder adapted to be shifted in to use.

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