Block redundancy for memory array

Details Block redundancy for memory array Block redundancy for memory array

1980-02-12

1981-07-28

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Bad bit

365210, 3072383, 307441, G11C 1300, G11C 1140

Patent

active

042813980

ABSTRACT:
Block redundancy is utilized to improve yield and lower die cost for an electrically programmable read only memory (EPROM). The EPROM is organized 8Kx8 with four primary memory blocks on each side of a central row decoder. Each block includes an array of memory cells, column select, column decode, sense amp, data buffer and other overhead circuitry. One block of redundant circuitry is also provided for each set of four blocks and includes a redundant memory matrix, a redundant column decoder, a redundant column select, a redundant sense amp and a redundant data buffer. Incorporated within each primary memory block is a multiplex logic circuit which is independently programmable to selectively disconnect the associated primary memory block and substitute the redundant memory block, including the redundant column decoder, column select, sense amp and data buffer. Each multiplex logic circuit includes a polysilicon fuse which is permanently programmable from a closed to an open circuit condition by applying a high voltage to the external data bit terminal which corresponds with the defective memory block cells. According to this arrangement, for each group of blocks, one out of four primary memory arrays including the associated column select, column decoder, sense amp and data buffer, may be replaced during wafer testing and after encapsulation.

REFERENCES:
patent: 3753235 (1973-08-01), Daughton
patent: 3753244 (1973-08-01), Sumilas et al.
patent: 3897626 (1975-08-01), Beausoleil
patent: 3940740 (1976-02-01), Coontz
patent: 3995261 (1976-11-01), Goldberg
patent: 4032765 (1977-06-01), Epstein
patent: 4074236 (1978-02-01), Ishida
patent: 4089063 (1978-05-01), Takezono
patent: 4183095 (1980-01-01), Ward

Affiliated with

Also associated with

Rating

Block redundancy for memory array does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Block redundancy for memory array, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Block redundancy for memory array will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-551968