Block RAM with embedded FIFO buffer

Details Block RAM with embedded FIFO buffer Block RAM with embedded FIFO buffer

2006-05-02

2006-05-02

Tan, Vibol (Department: 2819)

Static information storage and retrieval

Read/write circuit

C365S189020, C365S230010, C365S230020, C365S236000, C326S038000, C326S039000

Reexamination Certificate

active

07038952

ABSTRACT:
A programmable logic device includes a block random access memory (“BRAM”) with an embedded first in, first out (“FIFO”) controller. Embedding the FIFO logic in silicon, rather than configuring it in the fabric of the programmable logic device, provides a reliable, high-speed asynchronous FIFO memory system.

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U.S. Appl. No. 10/839,630, filed May 4, 2004, Zack et al.
U.S. Appl. No. 10/838,957, filed May 4, 2004, Lowe et al.

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