Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-08-23
2005-08-23
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
06934901
ABSTRACT:
A method and system for interleaving blocks of data. The method includes partitioning an input bitstream into multiple bitstreams, interleaving the multiple bitstreams into a single bitstream, partitioning the single bitstream into multiple different bitstreams, and shuffling the bits of the different bitstreams. Exemplary applications include the IEEE 802.11astandard interleaver stage.
REFERENCES:
patent: 6594792 (2003-07-01), Hladik et al.
Avni Ofir
Dagan Amit
De'cady Albert
Intel Corporation
Kenyon & Kenyon
Kerveros James C
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