Block-based data striping to flash memory

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output addressing

Reexamination Certificate

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C710S005000, C710S033000, C710S104000

Reexamination Certificate

active

07660911

ABSTRACT:
In various embodiments, options for data striping to FLASH memory are provided. In one embodiment, an apparatus is provided. The apparatus includes an SATA to ATA bridge, an ATA to USB bridge coupled to the SATA to ATA bridge, and a USB interface coupled to the ATA to USB bridge. The apparatus also includes a first FLASH memory controller coupled to the USB interface. The apparatus further includes a first FLASH memory module coupled to the first FLASH memory controller. The apparatus also includes a second FLASH memory controller coupled to the USB interface and a second FLASH memory module coupled to the second FLASH memory controller. A method for block striping data to or from a plurality of read or write channels.

REFERENCES:
patent: 2006/0282573 (2006-12-01), Maeda et al.
patent: 2007/0260580 (2007-11-01), Omoigui

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