Static information storage and retrieval – Read/write circuit
Reexamination Certificate
2007-12-04
2007-12-04
Nguyen, Tan T. (Department: 2827)
Static information storage and retrieval
Read/write circuit
C365S154000, C365S201000, C365S203000
Reexamination Certificate
active
11225571
ABSTRACT:
Bitline variable methods and circuits for evaluating static memory cell dynamic stability provide a mechanism for raising the performance of memory arrays beyond present levels/yields. By altering the bitline pre-charge voltage of a static random access memory (SRAM) memory cell, operating the cell and observing changes in performance caused by the changes in the bitline voltage, the dynamic stability of the SRAM cell can be studied over designs and operating environments. Alternatively or in combination, the loading at the outputs of the cell can altered in order to affect the performance of the cell. In addition, cell power supply voltages can be split and set to different levels in order to study the effect of cell asymmetry in combination with bitline pre-charge voltage differences.
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Devgan Anirudh
Joshi Rajiv V.
Ye Qiuyi
Harris Andrew M.
Mitch Harris Atty at Law, LLC
Nguyen Tan T.
Salys Casimer K.
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