Bitline pull-up circuit for a BiCMOS read/write memory

Details Bitline pull-up circuit for a BiCMOS read/write memory Bitline pull-up circuit for a BiCMOS read/write memory

1988-02-16

1989-09-12

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

365190, 365203, 365207, 36518909, G11C 700

Patent

active

048666742

ABSTRACT:
A BiCMOS static random access memory (SRAM) device is disclosed. The SRAM has an individual sense amplifier for each column therein, with bipolar pull-up transistors at the end of the bit lines opposite the sense amplifier. A pull-up control circuit which responds to the input data bus is provided for controlling the bias of the bases of the pull-up transistors so that, during a read cycle, the base of the pull-up device associated with the low side bit line is biased to a voltage which is lower than that to which the base of the pull-up device will be biased for a read; as a result, the time at which the bit line voltages cross-over for a read of an opposite data state is reduced. The pull-up control circuit further provides a low pass filter, for reducing the effects of power supply noise on the bit line differential voltage.

REFERENCES:
patent: 4556851 (1985-12-01), Levine
patent: 4661928 (1987-04-01), Yasuoka
patent: 4730279 (1988-03-01), Ohtani

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