Bit slice multiplication circuit

Details Bit slice multiplication circuit Bit slice multiplication circuit

1986-10-08

1989-03-07

Harkcom, Gary V.

Boots, shoes, and leggings

364759, G06F 752

Patent

active

048112690

ABSTRACT:
A bit slice multiplication circuit operating to slice a multiplier, produce products for the sliced multipliers and a multiplicand and sum the products to obtain the multiplication result. The circuit includes a slicing unit for slicing the multiplicand, multiplying units corresponding in number to the number of sliced multiplicands, and adding units provided in correspondence to the multiplying units and implementing summation for multiplication results from corresponding multiplying units while shifting the sliced portions of the multiplicand at each multiplying operation for sliced multipliers and multiplicands by the multiplying units, the multiplication result being obtained by summing all summation results produced by the adding units.

REFERENCES:
patent: 4594679 (1986-06-01), George et al.
patent: 4644491 (1987-02-01), Ookawa et al.
Kwang, "Computer Arithmetic Principles, Architecture and Design", Chapter 5, John Wiley & Son Inc., 1979.

Affiliated with

Also associated with

Rating

Bit slice multiplication circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bit slice multiplication circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bit slice multiplication circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1675166