Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
Reexamination Certificate
2008-07-01
2011-12-20
Gaffin, Jeffrey A (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error count or rate
C714S712000
Reexamination Certificate
active
08082474
ABSTRACT:
Shadow selection logic is used to select a driver bit position as a shadowed driver value, and line drivers to transmit data for the selected driver bit position and the shadowed driver value on separate link segments of a bus. In addition, shadow compare logic is used to compare a selected received value with a shadowed received value from the bus and identify a miscompare in response to a mismatch of the compare Shadow counters are used to count a rate of the miscompare relative to a bus error rate over a period of time. A defective link segment is identified in response to the rate of the miscompare within a predefined threshold of the bus error rate.
REFERENCES:
patent: 4034195 (1977-07-01), Bates
patent: 4201885 (1980-05-01), Vrba
patent: 4376306 (1983-03-01), Giusto
patent: 4468770 (1984-08-01), Metcalf et al.
patent: 4631686 (1986-12-01), Ikawa et al.
patent: 4644498 (1987-02-01), Bedard et al.
patent: 4775979 (1988-10-01), Oka
patent: 5321813 (1994-06-01), McMillen et al.
patent: 5513135 (1996-04-01), Dell et al.
patent: 6067262 (2000-05-01), Irrinki et al.
patent: 6070256 (2000-05-01), Wu et al.
patent: 6119181 (2000-09-01), Vorbach et al.
patent: 6147967 (2000-11-01), Ying et al.
patent: 6297995 (2001-10-01), McConnell et al.
patent: 6308286 (2001-10-01), Richmond et al.
patent: 6337817 (2002-01-01), Horiguchi et al.
patent: 6338154 (2002-01-01), Kim
patent: 6367042 (2002-04-01), Phan et al.
patent: 6381685 (2002-04-01), Dell et al.
patent: 6518593 (2003-02-01), Takabayashi et al.
patent: 6526461 (2003-02-01), Cliff
patent: 6531339 (2003-03-01), King et al.
patent: 6789212 (2004-09-01), Klingman
patent: 6895528 (2005-05-01), Cantwell et al.
patent: 6931564 (2005-08-01), Goodman et al.
patent: 6973605 (2005-12-01), Templeton et al.
patent: 7013416 (2006-03-01), Whetsel
patent: 7058918 (2006-06-01), Abramovici et al.
patent: 7069494 (2006-06-01), Cargnoni et al.
patent: 7093182 (2006-08-01), Dickson
patent: 7154723 (2006-12-01), Warnakulasooriya et al.
patent: 7168005 (2007-01-01), Adams et al.
patent: 7178076 (2007-02-01), Zarrineh et al.
patent: 7181659 (2007-02-01), Bravo et al.
patent: 7209453 (2007-04-01), Yun et al.
patent: 7277346 (2007-10-01), Rahim et al.
patent: 7299313 (2007-11-01), Gower et al.
patent: 7334149 (2008-02-01), Wu
patent: 7353316 (2008-04-01), Erdmann
patent: 7362697 (2008-04-01), Becker et al.
patent: 2002/0024455 (2002-02-01), Abbiate et al.
patent: 2002/0075982 (2002-06-01), Doblar
patent: 2003/0074619 (2003-04-01), Dorsey
patent: 2003/0185251 (2003-10-01), Ichino et al.
patent: 2004/0180455 (2004-09-01), Marr
patent: 2004/0190331 (2004-09-01), Ross et al.
patent: 2004/0216026 (2004-10-01), Ferraiolo et al.
patent: 2004/0250181 (2004-12-01), Vogt et al.
patent: 2004/0258039 (2004-12-01), Stephens
patent: 2005/0138496 (2005-06-01), Brennan et al.
patent: 2005/0174138 (2005-08-01), Marr
patent: 2005/0210185 (2005-09-01), Renick
patent: 2005/0223196 (2005-10-01), Knowles
patent: 2005/0246597 (2005-11-01), Whetsel
patent: 2005/0273632 (2005-12-01), Kawakami
patent: 2005/0281112 (2005-12-01), Ito et al.
patent: 2006/0036827 (2006-02-01), Dell et al.
patent: 2006/0095620 (2006-05-01), Dreps et al.
patent: 2006/0107175 (2006-05-01), Dell et al.
patent: 2006/0179369 (2006-08-01), Bravo et al.
patent: 2006/0179394 (2006-08-01), O'Neill et al.
patent: 2006/0218455 (2006-09-01), LeClair et al.
patent: 2006/0277363 (2006-12-01), Qiu et al.
patent: 2007/0011562 (2007-01-01), Alexander et al.
patent: 2007/0075734 (2007-04-01), Ramos et al.
patent: 2007/0204190 (2007-08-01), Hesse et al.
patent: 2007/0283223 (2007-12-01), Dell et al.
patent: 2007/0288816 (2007-12-01), Nakanishi
patent: 2007/0300129 (2007-12-01), Dell et al.
patent: 2008/0005644 (2008-01-01), Dell
patent: 2008/0022186 (2008-01-01), Co et al.
patent: 2008/0028345 (2008-01-01), Suri et al.
patent: 2008/0046774 (2008-02-01), Hirai et al.
patent: 2008/0046796 (2008-02-01), Dell et al.
patent: 2008/0065938 (2008-03-01), Cowell et al.
patent: 2008/0115137 (2008-05-01), Gower et al.
patent: 1622020 (2006-02-01), None
patent: 02-307254 (1990-12-01), None
patent: 03-234125 (1991-10-01), None
patent: 09-261210 (1997-10-01), None
G. Boudon et al., “Novel Bus Reconfiguration Scheme With Spare Lines”, IBM Technical Bulletin, May 1987, pp. 5590-5593.
Sunggu Lee, et al., “Probabilistic Diagnosis of Multiprocessor Systems”, ACM Computing Surveys, Mar. 1994, pp. 121-139, vol. 26, No. 1.
Alan Charlesworth et al., “The Starfire SMP Interconnect”, 1997, pp. 1-20, ACM.
Daniele Rossi et al., “New ECC for Crosstalk Impact Minimization”, Jul./Aug. 2005, pp. 340-348 IEEE CS and the IEEE CASS.
Smitha Shyam et al., “Ultra Low-Cost Defect Protection for Microprocessor Pipelines”, ASPLOS'06, Oct. 21-25, 2006, pp. 73-82, ACM, San Jose, California, USA.
D.M Berger et al., “High-Speed source-synchronous interface for the IBM System z9 processor” IBM J. Res & Dev., Jan. 2007, pp. 53-64, vol. 51, No. 1/2, IBM.
FBDIMM: Architecture and Protocal, Jan. 2007, JESD206, JEDEC Solid State Technology Association, Arlington, VA USA.
Dreps Daniel M.
Ferraiolo Frank D.
Gower Kevin C.
Reese Robert J.
Cantor & Colburn LLP
Gaffin Jeffrey A
Gandhi Dipakkumar
International Business Machines - Corporation
LandOfFree
Bit shadowing in a memory system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bit shadowing in a memory system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bit shadowing in a memory system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4298743