Bit pattern generator

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Details

364490, 364518, G06F 1540

Patent

active

045286345

ABSTRACT:
A bit pattern generator includes two memories which are provided for storing a bit pattern for a scanning line produced from design data. When a bit pattern is created and stored in one of the memories, the previously created and stored bit pattern is read out from the other memory. For the creation of each bit pattern, a scanning line is divided into a plurality of bytes. Model patterns of bit patterns existing in the respective bytes are stored in a ROM. From the combination of start point and end point addresses specifying the byte positions and the ROM addresses, a ROM address for each byte is logically determined so that any model patterns in the ROM are sequentially stored in the first mentioned memories.

REFERENCES:
patent: 4218142 (1980-08-01), Kryger et al.
patent: 4280186 (1981-07-01), Hidai et al.
patent: 4377849 (1983-03-01), Finger et al.
patent: 4433384 (1984-02-01), Berrian et al.
patent: 4482810 (1984-11-01), Cooke

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