Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2002-09-26
2008-11-18
Nguyen, Viet Q (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185250, C365S185110, C365S189160, C365S203000, C365S204000
Reexamination Certificate
active
07453729
ABSTRACT:
A NAND EEPROM having a shielded bit line architecture reduces supply voltage and ground noise resulting from charging or discharging bit lines. The EEPROM has a PMOS pull-up transistor and an NMOS pull down transistor connected to a virtual power node. A control circuit for charging or discharging bit lines controls the gate voltage of the PMOS or NMOS transistor to limit peak current when charging or discharging bit lines via the virtual power node. In particular, the control circuit operates the PMOS or NMOS transistor in a non-saturation mode to limit current. One such control circuit creates a current mirror or applies a reference voltage to control gate voltages. A programming method sets up bit lines by pre-charging unselected bit lines via the PMOS pull-up transistor having controlled gate voltage while latches in the programming circuitry charge or discharge selected bit lines according to respective data bits being stored. Another bit line setup includes two stages. A first stage pre-charges all bit lines via PMOS pull-up, and the second stage uses the latches to discharge or leave charged the selected bit lines depending on respective data bits being stored. The gate voltages of NMOS transistors in the programming circuitry can be controlled to reduce noise caused by discharging selected bit lines through the latches.
REFERENCES:
patent: 4969125 (1990-11-01), Ciraula et al.
patent: 5006738 (1991-04-01), Usuki et al.
patent: 5241497 (1993-08-01), Komarek
patent: 5680347 (1997-10-01), Takeuchi et al.
patent: 5754010 (1998-05-01), Caravella et al.
patent: 5761123 (1998-06-01), Kim et al.
patent: 5798967 (1998-08-01), Sarin et al.
patent: 5889720 (1999-03-01), Lisart et al.
patent: 6031760 (2000-02-01), Sakui et al.
patent: 6049494 (2000-04-01), Sakui et al.
patent: 6055188 (2000-04-01), Takeuchi et al.
patent: 6058042 (2000-05-01), Nobukata
patent: 6058044 (2000-05-01), Sugiura et al.
patent: 6097638 (2000-08-01), Himeno et al.
patent: 6134140 (2000-10-01), Tanaka et al.
patent: 6147893 (2000-11-01), Liu
patent: 6172917 (2001-01-01), Kataoka et al.
patent: 6208560 (2001-03-01), Tanaka et al.
patent: 6278636 (2001-08-01), Lee
patent: 6288936 (2001-09-01), Kawamura
patent: 6301153 (2001-10-01), Takeuchi et al.
patent: 6335881 (2002-01-01), Kim et al.
patent: 6411548 (2002-06-01), Sakui et al.
patent: 6462584 (2002-10-01), Proebsting
patent: 6480419 (2002-11-01), Lee
patent: 6611460 (2003-08-01), Lee et al.
patent: 6614688 (2003-09-01), Jeong et al.
patent: 6751124 (2004-06-01), Lee
patent: 6813187 (2004-11-01), Lee
patent: 2002/0001227 (2002-01-01), Kim et al.
patent: 2002/0114188 (2002-08-01), Lee
patent: 2003/0026145 (2003-02-01), Lee
patent: 1271945 (2003-08-01), None
patent: 10056881 (2002-05-01), None
patent: 001235230 (2002-08-01), None
patent: 58-121195 (1983-07-01), None
patent: 04-276393 (1992-10-01), None
patent: 05-144277 (1993-06-01), None
patent: 06-314497 (1994-11-01), None
patent: 11-120779 (1999-04-01), None
patent: 411273374 (1999-10-01), None
patent: 10-2002-0001407 (2002-01-01), None
patent: 10-2000-0059746 (2002-10-01), None
Search Report.
German Office Action dated Oct. 19, 2005, for German Application No. 104 17 279.3-53.
Harness & Dickey & Pierce P.L.C.
Nguyen Viet Q
Samsung Electronics Co,. Ltd.
LandOfFree
Bit line setup and discharge circuit for programming... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bit line setup and discharge circuit for programming..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bit line setup and discharge circuit for programming... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4030848