Bit line sense amplifier control circuit

Details Bit line sense amplifier control circuit Bit line sense amplifier control circuit

2007-11-20

2007-11-20

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S207000, C365S222000, C327S051000

Reexamination Certificate

active

11604764

ABSTRACT:
A bit line sense amplifier control circuit includes a driving signal generating unit adapted and configured to generate first through third driving signals in response to a bit line sense amplifier enable signal and an overdrive enable signal for setting an overdrive period, and to disable a first driving signal which is enabled for an overdrive period in response to a refresh signal which is enabled at a refresh mode, and a bit line sense amplifier control signal generating unit adapted and configured to generate first and second bit line sense amplifier control signals in response to the first through third driving signals. As a result, an overdrive pulse is not generated at a refresh mode to remove an overdriving period, thereby reducing current consumption at a refresh mode.

REFERENCES:
patent: 6344760 (2002-02-01), Pyo
patent: 6459639 (2002-10-01), Nishimura
patent: 6566929 (2003-05-01), Pyo
patent: 6754122 (2004-06-01), Wada et al.
patent: 6973002 (2005-12-01), Hara et al.
patent: 2001/0012227 (2001-08-01), Nishimura
patent: 1999-65148 (1999-08-01), None
patent: 2001-61380 (2001-07-01), None

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