Bit-line pull-up circuit or static random access memory (SRAM) d

Details Bit-line pull-up circuit or static random access memory (SRAM) d Bit-line pull-up circuit or static random access memory (SRAM) d

1997-01-02

1998-07-07

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257390, 257903, H01L 2976, H01L 2994, H01L 31062, H01L 31113

Patent

active

057773696

ABSTRACT:
A bit-line pull-up circuit for an SRAM device which utilizes an improved diffusion structure for enhanced immunity of the SRAM device against electrostatic discharge. The improved diffusion structure includes an undivided diffusion region that serves as a common drain for a plurality of MOS transistors. The undivided diffusion region has at least a pair of recessed diffusion edges formed on opposite sides thereof. The forming of the recessed diffusion edges prevents the so-called electrical field crowding effect and also enhances ESD immunity for the MOS transistor. Further, since the drain diffusion region is an undivided area, an increased number of metal contact windows are provided therein, and at least one of the metal contact windows is arranged substantially between the two recessed diffusion edges. In the event of an electrostatic discharge, this allows the discharge current flowing into the drain to be divided into a greater number of small-magnitude currents flowing to the source.

REFERENCES:
patent: 5124774 (1992-06-01), Godinho et al.
patent: 5227665 (1993-07-01), Nakamura et al.
patent: 5241205 (1993-08-01), Shimizu et al.
patent: 5336914 (1994-08-01), Andoh
patent: 5508564 (1996-04-01), Lee et al.
patent: 5534724 (1996-07-01), Nagamine

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