Bit level programming interface in a content addressable memory

Details Bit level programming interface in a content addressable memory Bit level programming interface in a content addressable memory

2006-01-31

2006-01-31

Sparks, Donald (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S128000, C711S202000, C711S206000, C711S209000, C711S211000, C711S212000, C365S049130, C370S371000, C370S381000, C370S382000, C370S383000, C370S395310, C370S395320

Reexamination Certificate

active

06993622

ABSTRACT:
An apparatus and method for generating a comparand in a content addressable memory array. The apparatus includes a content addressable memory (CAM) array and translation circuitry to receive translation information indicative of translation of a bit group from an initial position in input data to a different position in a comparand transmitted to the CAM array. The translation circuitry includes a switch circuit, one or more storage elements to store the translation information, and one or more decode circuitry to decode the translation information and establish switch circuit connections between the initial position and the position in the comparand. The apparatus also includes program circuitry to provide a bit level programming interface with the translation circuitry. The apparatus may also include a programming bit register to store programming information in the form of a binary pattern where each bit represents a bit group of the input data.

REFERENCES:
patent: 3648254 (1972-03-01), Beausoleil
patent: 4996666 (1991-02-01), Duluk, Jr.
patent: 5046046 (1991-09-01), Sweha et al.
patent: 5088066 (1992-02-01), Castro
patent: 5319589 (1994-06-01), Yamagata et al.
patent: 5438535 (1995-08-01), Lattibeaudiere
patent: 5444649 (1995-08-01), Nemirovsky
patent: 5619713 (1997-04-01), Baum et al.
patent: 5809330 (1998-09-01), Ninomiya
patent: 5890005 (1999-03-01), Lindholm
patent: 5920886 (1999-07-01), Feldmeier
patent: 5956336 (1999-09-01), Loschke et al.
patent: 5978885 (1999-11-01), Clark, II
patent: 6041389 (2000-03-01), Rao
patent: 6069573 (2000-05-01), Clark, II et al.
patent: 6081440 (2000-06-01), Washburn et al.
patent: 6169685 (2001-01-01), Gandini et al.
patent: 6243281 (2001-06-01), Pereira
patent: 6275406 (2001-08-01), Gibson et al.
patent: 6289414 (2001-09-01), Feldmeier
patent: 6324087 (2001-11-01), Pereira
patent: 6351142 (2002-02-01), Abbott
patent: 6353873 (2002-03-01), Melchior
patent: 6373758 (2002-04-01), Hughes et al.
patent: 6374326 (2002-04-01), Kansal et al.
patent: 6424659 (2002-07-01), Viswanadham et al.
patent: 6445628 (2002-09-01), Pereira et al.
patent: 6525987 (2003-02-01), Hilbert
patent: 6597595 (2003-07-01), Ichiriu et al.
patent: 6629099 (2003-09-01), Cheng
patent: 6658002 (2003-12-01), Ross et al.
patent: 6691252 (2004-02-01), Hughes et al.
patent: 2002/0007446 (2002-01-01), Stark
patent: 2002/0015348 (2002-02-01), Gillingham et al.
patent: 2002/0073073 (2002-06-01), Cheng
patent: 2002/0126672 (2002-09-01), Chow et al.
patent: 2003/0005146 (2003-01-01), Miller et al.
patent: 2003/0039135 (2003-02-01), Srinivasan et al.
patent: 2003/0131331 (2003-07-01), Reblewski et al.
patent: 2004/0032775 (2004-02-01), Srinivasan
PCT Search Report, International application No. PCT/US02/28827, International filing date Sep. 10, 2002.

Affiliated with

Also associated with

Rating

Bit level programming interface in a content addressable memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bit level programming interface in a content addressable memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bit level programming interface in a content addressable memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3549836