Bit error rate tester implemented in a programmable logic...

Details Bit error rate tester implemented in a programmable logic... Bit error rate tester implemented in a programmable logic...

2007-03-20

2007-03-20

Britt, Cynthia (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error count or rate

C714S725000

Reexamination Certificate

active

10725898

ABSTRACT:
The present invention provides a bit error rate tester implemented in a programmable logic device. Any or all of the components of the bit error rate tester may be implemented through software by programming the programmable logic circuitry of the programmable logic device to implement the components of the bit error rate tester. The bit error tester may determine the bit error rate of any suitable interface either within the programmable logic device or external to the programmable logic device. In order to allow a user to interact with the bit error rate tester, user equipment, such as a personal computer, may be coupled to the bit error rate tester.

REFERENCES:
patent: 6628621 (2003-09-01), Appleton et al.
patent: 7032139 (2006-04-01), Iryami et al.
patent: 2005/0050190 (2005-03-01), Dube
“How Programmable Logic Works” by Michael Barr published Jun. 1999, Embedded Systems Programming on pp. 75-84 located on the web at http://www.netrino.com/Articles/ProgrammableLogic/index.html.
“Jitter Fundamentals: Agilent N4900 Serial BERT Series Jitter Injection and Analysis Capabilities,” Application Note, Agilent Technologies, Nov. 2003, pp. 1-24.
“Understanding and Characterizing Timiing Jitter,” Tektronix, www.tektronix.com/jitter, 2003, pp. 1-24.
“Annex 48B: Jitter test methods,” IEEE Std 802.3ae-2002, IEEE, 2002, pp. 505-514.
Wang, et al., “Equalization Techniques,” Carleton University, presentation slides.

Affiliated with

Also associated with

Rating

Bit error rate tester implemented in a programmable logic... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bit error rate tester implemented in a programmable logic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bit error rate tester implemented in a programmable logic... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3778106