Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2001-07-12
2004-09-07
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C375S341000
Reexamination Certificate
active
06789225
ABSTRACT:
BACKGROUND
The present invention relates to bit errors, and more particularly, to estimating bit error positions in a data decoder.
Error correcting techniques for correcting bit errors in digital data are often used to improve the reliability of data transmission. These techniques attempt to accurately retrieve the data with lowest bit error rate (BER). For example, a scheme of coding data by using convolutional codes and performing maximum likelihood decoding by using Viterbi decoding has a high error correcting capability. However, certain data such as compressed video data may be especially sensitive to bit errors. Thus, data frames containing bit errors may be identified using techniques such as cyclic redundancy check. In some applications or protocols, such as Transmission Control Protocol (TCP), these data frames containing bit errors may be retransmitted. However in other applications or protocols, such as real-time streaming video or User Datagram Protocol (UDP), re-transmission of error frames may not be practical or supported.
Further, when a frame of data such as video data known to contain errors is decoded for display, data recovery and/or error concealment techniques may be employed to mitigate visual distortions or artifacts caused by the errors. However if the position of bit errors within the frame cannot be estimated, substantially all or most of the error frame data, including both corrupted and uncorrupted data, may have to be discarded. Therefore, data recovery and/or error concealment techniques may be made substantially less practical when even the uncorrupted data is discarded.
SUMMARY
In one aspect, a method for estimating a bit error position is disclosed. The estimation method includes generating data indicative of a substantial number of bit error locations in data frames. The data generation includes re-encoding decoded bit stream, mapping the bit stream to a first set of symbols, and determining a soft decision distance between a second set of symbols received through a data transmission channel and the first set of symbols. The generated data is then used to estimate the bit error locations. The estimation process includes capturing metric data for each bit in the data frame and obtaining derivative of the metric data. The derivative may be filtered for further processing. Error position estimation criteria may then be applied to estimate the bit error positions.
In another aspect, a bit error position estimation system is disclosed. The system includes a de-interleaver, a convolutional decoder, a convolutional re-encoder, a map symbol generator, and a position estimation metric generator. In some systems, the de-interleaver and the convolutional decoder are part of the existing receiver in a data transmission system. The de-interleaver receives and de-interleaves a first set of encoded data symbols. The convolutional decoder performs maximum likelihood decoding of the data symbols into data bit stream. The convolutional re-encoder re-codes decoded data bit stream. The map symbol generator maps the re-coded bit stream to a second set of data symbols. The position estimation metric generator then determines metric data between the first and second sets of data symbols.
REFERENCES:
patent: 6012158 (2000-01-01), Kurita et al.
patent: 6366624 (2002-04-01), Balachandran et al.
Chan Joseph C.
Dorney Robert L.
Chase Shelly A
De'cady Albert
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