Bit compression circuit used for a delta sigma type digital-to-a

Details Bit compression circuit used for a delta sigma type digital-to-a Bit compression circuit used for a delta sigma type digital-to-a

1993-02-23

1995-02-21

Young, Brian K.

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

341144, H03M 302

Patent

active

053920406

ABSTRACT:
A quantization circuit samples input digital data represented by a predetermined number of bits fed during a given period on a sampling period shorter than the digital data input period and converts the sampled data into quantized digital data having a fewer number of bits than the input digital data. Quantization noise at the quantization circuit is fed back into an input side of the quantization circuit to form a noise shaping loop. The noise shaping loop is provided with an auxiliary loop containing an integrator, and the integrating result is selectively added. Then, the noise shaping loop degree can be changed by determining whether or not the integrating result is to be added. An infinite impulse response filter is located on a feedback loop of the noise shaping loop for averaging noise, thereby improving the noise removing performance without raising the noise shaping loop degree.

REFERENCES:
patent: 5068661 (1991-11-01), Kaneaki et al.
"Oversampled, Linear Predictive and Noise-Shaping Coders of Order N 1", IEEE Transactions on Circuits and Systems, vol. CAS-25, No. 7, Jul. 1978, Stuart K. Tewksbury, et al., pp. 436-447.

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