Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1985-10-17
1989-01-03
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
371 10, G11C 700
Patent
active
047962330
ABSTRACT:
A bipolar-transistor type semiconductor memory device including a normal memory cell array, redundancy memory cell array, a redundancy driving circuit, and a redundancy address decision circuit. When the redundancy address decision circuit determines that the input address coincides with the address of a defective circuit portion, the redundancy driving circuit is driven to enable the redundancy memory cell array instead of the normal memory cell array.
REFERENCES:
patent: 4365319 (1982-12-01), Takemae
patent: 4399372 (1983-08-01), Tanimoto et al.
patent: 4428068 (1984-01-01), Baba
patent: 4592024 (1986-05-01), Sakai et al.
Awaya Tomoharu
Fukushi Isao
Fujitsu Limited
Popek Joseph A.
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