Bipolar transistor that can be fabricated in CMOS

Details Bipolar transistor that can be fabricated in CMOS Bipolar transistor that can be fabricated in CMOS

1999-12-31

2001-10-09

Loke, Steven (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S364000, C257S378000, C257S245000, C257S288000

Reexamination Certificate

active

06300660

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductors, and more particularly, to a CMOS FET that can mimic a bipolar junction transistor.
BACKGROUND OF THE INVENTION
It would be advantageous to be able to provide a device that amplifies a current in response to a control current in some CMOS devices. For example, current-mode sense amplifiers for use in reading-out memory cells have faster read times than voltage-based devices. Unfortunately, conventional CMOS fabrication techniques are not well-adapted for fabricating current-to-current gain devices such as bipolar junction transistors. Normal CMOS processing does not provide full junction isolation of the type needed to construct bipolar junction transistors. Hence, to construct such transistors in CMOS, 3 to 5 additional masking steps and additional implant/diffusion steps are required. This increases the cost of the devices and requires larger die sizes.
Broadly, it is the object of the present invention to provide an improved CMOS transistor design.
It is a further object of the present invention to provide a CMOS device that controls a current in response to another current.
It is yet another object of the present invention to provide a CMOS device that mimics the behavior of a bipolar junction transistor.
These and other objects of the present invention will become apparent to those skilled in the art from the following detailed description of the invention and the accompanying drawings.
SUMMARY OF THE INVENTION
The present invention is a variable conductance device having a first source region and a first drain region in a semiconductor substrate. A first channel region connects the first source and the first drain regions. A first resistive layer overlies the first channel region and has first and second electrical contacts spaced apart from one another thereon. The conductance of the path between the first source region and the first drain region depends on the current flowing between the first and second electrical contacts. By adding a FET having its gate and source shorted together to the variable conductance device, a device having the current gain characteristics of a bipolar transistor is obtained. The first drain region is connected to the drain of the FET and the source of the FET is connected to the second electrical contact. The precise form of the current transfer function can be altered by connecting a number of variable conductance devices according to the present invention in parallel.


REFERENCES:
patent: 358039064 (1983-03-01), None

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