Bipolar ECL to inverted CMOS level translator

Details Bipolar ECL to inverted CMOS level translator Bipolar ECL to inverted CMOS level translator

1993-12-10

1995-06-13

Hudspeth, David R.

Electronic digital logic circuitry

Interface

Logic level shifting

326 66, 326126, H03K 190195

Patent

active

054246580

ABSTRACT:
A level shifting circuit which can be implemented as part of a bipolar ECL integrated circuit, provides reliable switching and level shifted output suitable for driving a low voltage CMOS integrated circuit. The circuit includes a level shifting circuit which is connected to trigger a high gain positive feedback bootstrap circuit to reliably ensure switching even under poor signal conditions. An output taken from one of the switched pair is allowed to go to V.sub.CC, 0 volts, or is clamped by a clamping circuit to -3.3 volts, representing the two output states suitable for driving inverted rail CMOS circuitry.

REFERENCES:
patent: 4849659 (1989-07-01), West
patent: 5030856 (1991-07-01), Dansky
patent: 5075580 (1991-12-01), Dayton
patent: 5283482 (1994-02-01), Chen
patent: 5321320 (1994-06-01), Collins

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