Binary counter with sped-up ripple carry

Details Binary counter with sped-up ripple carry Binary counter with sped-up ripple carry

1994-11-08

1996-09-24

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Particular transfer means

Including logic circuit

377 81, H03K 2100

Patent

active

055598447

ABSTRACT:
A binary counter or binary-coded-arithmetic counter uses local look-ahead to speed up ripple carry propagation. A succession of counter stages therein can be identified by respective consecutive ordinal numbers assigned in accordance with the order of carry propagation. Each counter stage receives a respective carry input and supplies a respective output signal, and each counter stage identified by even number supplies a respective complemented output signal. Each counter stage identified by odd number has a respective carry generation circuit for supplying a respective carry output signal which includes a NAND gate responsive to carry input to that counter stage and responsive to output signal from that counter stage, carry input for the next counter stage being supplied in response to the NAND gate response. Each counter stage identified by even number has a respective carry generation circuit for supplying a respective carry output signal which includes a NOR gate responsive to the NAND gate response used for determining carry input for that counter stage and responsive to complemented output signal from that counter stage, carry input for the next counter stage being supplied in response to said NOR gate response.

REFERENCES:
patent: 4741006 (1988-04-01), Yamaguchi et al.
patent: 4780894 (1988-10-01), Watkins et al.
patent: 4924484 (1990-05-01), Grasso et al.

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