Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2000-08-17
2002-03-26
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S080000, C326S021000
Reexamination Certificate
active
06362654
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
The present application is related to the inventor's application “VOLTAGE STABILIZED LOW LEVEL DRIVER”, which was filed on the same day as the present application, and is herein incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of electronics, and in particular to a device that facilitates the interconnection of devices using an I
2
C interface.
2. Description of Related Art
The Inter Integrated Circuit (I
2
C) bus developed by Philips Corporation allows integrated circuits to communicate directly with each other via a simple bi-directional 2-wire (plus ground) bus. A device connects to each of the two wires on the bus, one (SData) for the communication of data, and the other (SClk) for the control and synchronization of the communication of data between the devices. Each device is connected in parallel to each of the other devices. Each of the bus lines, SData and SClk, function as a wired-AND of all the lines on the bus. The output of each device is configured as an open-collector/open-drain device, and one or more pull-up resistors maintain a ‘soft’ logic high value on the bus while the bus is in the quiescent state. When a device desires access to the bus, the device pulls the bus to a logic low value, via the open-collector/open-drain device that is placed in a conductive state to ground potential.
To facilitate a high speed data transfer, the I
2
C specification limits the maximum capacitive loading on the bus, thereby limiting the maximum length of the bus. The specified maximum capacitive loading is 400 pf, which limits the bus length to a few meters. The 82B715 integrated circuit from Philips Semiconductors is an I
2
C bus extender that allows for routing of the bus beyond the specified maximum length. The 82B715 offers a current gain of ten from the input to the output, thereby providing a capacitive reduction of ten to the bus on the input side of the bus extender. By placing a bus extender at each end of a long length of wire, only one tenth of the capacitance of the wire appears as a load to the I
2
C bus or device at each end of the long length of wire. Note, however, that because of the current gain, the output of each 82B715 at either end of the long length of wire is not I
2
C compatible, because the I
2
C specification also limits the maximum current that any device can place on the I
2
C bus. Note, also, that this lack-of-I
2
C-compatibility provides an advantage with regard to the choice of media between the pair of 82B715s. In lieu of the long length of wire between the pair of 82B715s, for example, a fiber optic or other media can be used.
A repeater is distinguished from an extender in that a repeater is conventionally defined as a device that reshapes a transmitted signal along the transmission path, and supports the transmission protocol and constraints on both sides of the repeater. A repeater is placed, for example, at the midpoint of a length of bus line, to reduce the loading on the half of the bus at its input, and to condition the signal for transmission to the other half of the bus. A typical uni-directional repeater comprises an input inverter that places little load on the input, and an output inverter comprising a driving inverter that is capable of driving a substantial load.
In a bi-directional configuration, wherein the same wire is used to both transmit and receive, a bus repeater appears as a pair of oppositely-oriented uni-directional repeaters that are wired in parallel to each other. Because the output of one uni-directional repeater is connected to the input of the other unidirectional repeater, a bi-directional repeater must be configured to distinguish an externally generated event on the bus from an internally generated event, to preclude a latch-up. Such a latch-up is caused when an input event that is propagated in one direction is interpreted as an input event from the other direction, and re-propagated to the original input to the bi-directional repeater. When the originator of the event ceases the event, this cessation must also be propagated in the same direction as the propagation of the original input event.
Conventional bi-directional repeaters typically include control logic that determines which side of the repeater is receiving a driving signal, and thereafter blocks any input from the opposite side of the repeater until the first side of the repeater no longer receives the driving signal.
FIG. 1
is an example block diagram of a conventional bi-directional repeater
100
, such as taught by U.S. Pat. No. 5,923,187, “MULTIDIRECTIONAL DATA TRANSMISSION DEVICE”, issued on Jul. 3, 1999 for Philippe Maugers, assigned to U.S. Philips Corporation, and incorporated by reference herein. Two uni-directional buffers Ca, Cb are controlled by two control devices Ga, Gb. When a control device Ga, Gb is enabled, a path is provided between the input I and the output O of the control device; otherwise, the path is blocked between the input I and the output O. Initially, with both inputs A and B in the inactive state, both gates Ga and Gb are enabled, thereby connecting the node A to the input of buffer Cb, and connecting the node B to the input of buffer Ca. The buffers Ca, Cb are non-inverting, and therefore the output of each is the inactive state, consistent with each node A, B. It is assumed herein that an active state overcomes the presence of an inactive state on the bus, such as a bus that operates as a logic-AND gate, and the active state is low. Alternatively, albeit rarely used, the active state may be high, and the bus operates as a logic-OR gate.
When one of the nodes, node A for example, transitions to the active state, via a driving signal from an external device
110
a
, the control device Ga recognizes this transition as the “first” transition, and asserts its F output, which disables the control device Gb. Because Ga remains enabled, the active state of node A is communicated to node B, and the external devices
110
b
, via the enabled device Ga and the buffer Cb. This active state at node B, however, is not communicated to the buffer Ca, because the gate Gb is disabled. Thus, node A is free to return to the inactive state when the external stimuli from device
110
a
that drove it to the active state is removed. After node A returns to the inactive state, and this inactive state is communicated to node B and the external devices
110
b
, control device Ga re-enables device Gb.
Note that, in the above example, if the control device Gb had been enabled, the propagated active state at node B would have been coupled to the buffer Ca, thereby internally driving the node A into the active state. Thereafter, when the external stimuli from device
110
a
that initially drove node A into the active state is removed, node A would have remained in the active state, being driven by the now-latched active state from node B through devices Gb and Ca. By decoupling the input B on one side of the repeater
100
when the other side A of the repeater
100
is active, via the control device Ga, this latching problem is avoided.
As is evident to one of ordinary skill in the art, the conventional repeater that decouples one side of the repeater when the other side is active presumes that only one side of the repeater is going to be active at any point in time. Or, if both sides are active, the first side to be active prevails. If, in the prior example, node B is externally driven to the active state by a device
110
b
, this active state will not be propagated to node A until after node A re-enters the inactive state and re-enables the control device Gb. Thus, on the B side of the repeater
100
, a continuous active state will be present from the time that node A enters the active state until the time that the node B leaves the active state. Whereas, on the A side of the repeater
100
, node A will be driven to the active state by its external stimuli, then enter the inactive state when the stimuli is removed, then re-enter th
Anderson Alma
Andrews Paul
Le Don Phu
Tokar Michael
Tsiang Harold
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