Electrical computers and digital data processing systems: input/ – Input/output data processing – Transfer direction selection
Reexamination Certificate
1993-07-23
2001-09-11
Coulter, Kenneth R. (Department: 2154)
Electrical computers and digital data processing systems: input/
Input/output data processing
Transfer direction selection
C710S105000
Reexamination Certificate
active
06289402
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to the field of microprocessor powered computers (microcomputers) and specifically to the communications protocols for coupling peripheral devices to microcomputers.
BACKGROUND OF THE INVENTION
Microprocessors typically have simple system bus organizations. The input/output (I/O) circuits connected to the bus are important for determining the power and flexibility of the I/O method used. Peripheral devices typically connect to a microcomputer by a multi-conductor cable that electrically couples the device to the I/O circuits of the microcomputer which are, in turn, coupled to the system bus. The point of attachment for the cable to the microcomputer is called a port.
In a simple I/O system, several lines are connected to the system bus including at least one line each for data, address and control, respectively. Data are read from the data line(s) and are typically placed in a latch for readout during output operations. There may be many control lines for initiating I/O read, I/O write, ready and wait states, among others.
Direct I/O may be used if the input data is valid for a long time compared with the microprocessor instruction execution time. Such a system is simple and inexpensive to build. When the output of an address decoder and the read control line are active, (the address line typically has an active state when the address bus matches the interface port number), the value of a datum is placed on the bus. The address line has an inactive state otherwise. When the decoder output and the write control are active, data are placed in the output latch from the bus.
If the input data are valid for a short time relative to the microprocessor execution time, then a strobed I/O system may be used to identify the time periods during which the input and output signals are guaranteed to be valid. This involves the addition of circuitry for processing the strobe signal and for interrupt signal processing, so that data are read/written only when so indicated by the strobe signal.
One of the most common types of interfaces is the serial interface, which passes one bit of data at a time. A wide variety of peripheral devices are designed to plug into serial ports. Several interfaces for serial communications are used, and are identified by technical specifications including EIA RS-232, RS-422, RS-423 and RS-485. The RS-232 interface has been one of the most common interfaces. The RS-232 interface may use a 9 or 24 pin connector. If 9 pins are used, two transmit data, four provide handshaking signals and two enable inputs.
A number of parallel transmission protocols have become more widely used. Most printers employ a byte-wide unidirectional protocol with a 36 pin connector, commonly known as a “Centronics” interface. Of the 36 pins, 11 pins provide data transmission paths (8 pins), strobe, busy and an acknowledge pulse when the last character is finished. The printer sets the busy path low when it is ready to receive data and high when it is not ready. When the microcomputer has data to send and the busy signal is low, the microcomputer asserts data and then a strobe signal (with data guaranteed valid on both sides of the strobe). Some microcomputers allow bidirectional use of the Centronics interface. A control bit is sent to the port to reverse the direction of the 8 bit data path.
More recently, additional parallel interface standards have been developed for connecting disks and other high-performance peripherals to microcomputers. These include the Small Computer System Interface (SCSI) and the Intelligent Peripheral Interface (IPI). SCSI is an 8 bit parallel cable interface with both asynchronous and synchronous modes. The SCSI interface includes handshakes and protocols for multiple hosts and multiple peripherals, making it quite complex. In a typical configuration, a device includes a SCSI controller, which may be connected through a device level interface or directly to the device bus for “embedded SCSI” (i.e., the SCSI bus is the device level interface). The SCSI controller is coupled by a flat cable to the motherboard of the microcomputer, typically through a SCSI host adaptor. Although the SCSI controller only requires 16 pins to transfer user data between the device and the host, a typical SCSI controller, such as the “CXD1185AQ” controller marketed by the Sony corporation of America, may have 48 additional connections for handshaking and commanding the SCSI controller.
A simpler interface is desired for communications between high performance peripherals and microcomputers.
SUMMARY OF THE INVENTION
The invention is a method and apparatus for bidirectionally transmitting a plurality of data values between a first processor and a second processor. Each data value represents a respective plurality of data bits.
A direction indicating signal is formed and transmitted from the first processor to the second processor. The direction indicating signal enables the second processor to transfer data to the first processor when the direction indicating signal is in a first state. The direction indicating signal notifies the second processor that the first processor is ready to transfer data to the second processor when the direction indicating signal is in a second state.
A clock signal is formed and transmitted from the first processor to the second processor. The clock signal is asynchronously changed from a first state to a second state when each respective one of the plurality of data values is transferred. The data values are transmitted between the processors in a direction indicated by the direction indicating signal. The clock signal is reset to the first state after each respective data signal is transferred.
REFERENCES:
patent: 4131944 (1978-12-01), Mager et al.
patent: 4246637 (1981-01-01), Brown et al.
patent: 4315308 (1982-02-01), Jackson
patent: 4439826 (1984-03-01), Lawrence et al.
patent: 4493028 (1985-01-01), Heath
patent: 4509113 (1985-04-01), Heath
patent: 4607328 (1986-08-01), Furukawa et al.
patent: 4851990 (1989-07-01), Johnson et al.
patent: 4872107 (1989-10-01), Marple et al.
patent: 4999769 (1991-03-01), Costes et al.
patent: 5131081 (1992-07-01), MacKenna et al.
patent: 5150465 (1992-09-01), Bush et al.
patent: 5163132 (1992-11-01), DuLac et al.
Amiga Development LLC
Coulter Kenneth R.
LandOfFree
Bidirectional data transfer protocol primarily controlled by... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bidirectional data transfer protocol primarily controlled by..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bidirectional data transfer protocol primarily controlled by... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2493238