Bidirectional buffer with active pull-up/latch circuit for mixed

Electronic digital logic circuitry – Interface – Supply voltage level shifting

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Details

326 86, 326121, 326 27, 326 57, H03K 190175, H03K 19094, H03K 1716

Patent

active

060609060

ABSTRACT:
In a preferred embodiment of the present invention, a bidirectional buffer connects a first device, such as a CMOS chip having a first voltage, such as VDD, to a second device having a second voltage, such as VCC, through a terminal pad. The buffer includes a first driver for driving a terminal pad up to the first voltage, wherein the first driver preferably includes a pair of in series PMOS transistors formed in an n floating well. The buffer further includes a second driver for driving the terminal pad down to a voltage VSS. Such a structure provides a simple circuit that requires only a single terminal pad, a single power supply, and is substantially free of dc leakage currents.

REFERENCES:
patent: 3335296 (1967-08-01), Smart
patent: 4782250 (1988-11-01), Adams et al.
patent: 5396128 (1995-03-01), Dunning et al.
patent: 5406140 (1995-04-01), Wert et al.
patent: 5424659 (1995-06-01), Stephens et al.

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