BICMOS sense amplifier with reverse bias protection

Static information storage and retrieval – Read/write circuit – Differential sensing

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Details

307530, 365177, 36518906, G11C 1134

Patent

active

052873145

ABSTRACT:
A memory (50) having a BICMOS sense amplifier (20) includes a differential amplifier stage (11), emitter-follower input transistors (25 and 26), and emitter-follower output transistors (27 and 28). When sense amplifier (20) is deselected, P-channel transistors (31-37) pull the bases of the bipolar transistors (23-28) to V.sub.DD -2V.sub.BE and P-channel transistors (29 and 30) decouple the bases of emitter-follower output transistors (27 and 28) from the collectors of transistors (23 and 24). At the same time, N-channel transistors (38, 40, 42, 44, and 46) decouple N-channel transistors (39, 41, 43, 45, and 47) from the emitters of bipolar transistors (23-28). Thus, no current can flow, reducing the power consumption of sense amplifier (20). Also, bipolar transistors (23-28) are prevented from being excessively reverse-biased. Additionally, a plurality of sense amplifiers (20) can have their outputs wired-OR connected.

REFERENCES:
patent: 4604533 (1986-08-01), Miyamoto et al.
patent: 4658159 (1987-05-01), Miyamoto
patent: 4961168 (1990-10-01), Tran
patent: 4984196 (1991-01-01), Tran et al.
patent: 4984207 (1991-01-01), Tateno et al.
patent: 4991141 (1991-02-01), Tran
patent: 4999519 (1991-03-01), Kitsukawa et al.
patent: 5046050 (1991-09-01), Kertis

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