Static information storage and retrieval – Read/write circuit – Including signal clamping
Patent
1989-05-03
1990-03-20
Moffitt, James W.
Static information storage and retrieval
Read/write circuit
Including signal clamping
365208, G11C 700
Patent
active
049107119
ABSTRACT:
A bipolar/CMOS read/write control and sensing circuit is provided for use with MOS memory cells in which data can be written into and sensed in the memory cells at high speeds. The MOS memory cell is coupled with a word line and between first and second bit lines at corresponding first and second sense nodes. The control and sensing circuit includes a bit-line clamping network which is responsive to an output control signal for clamping the first and second bit lines during a read operation so as to present a low impedance thereby decreasing the read time and for unclamping of the first and second bit lines during a write operation so as to present a high impedance which reduces the write time.
REFERENCES:
patent: 4785427 (1988-11-01), Young
Advanced Micro Devices , Inc.
Chin Davis
Moffitt James W.
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