Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1992-07-20
1999-01-05
Tran, Minh-Loan
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257378, 257401, 257328, H01L 2702, H01L 2968, H01L 2972
Patent
active
058566953
ABSTRACT:
A BiCMOS process which provides both low voltage (digital) and high voltage (analog) CMOS devices. The high voltage NMOS devices have a compensated drain formed by the NPN and PNP base implants. The PNP base plus the high voltage NMOS drain carrier concentrations are both optimized by adjustment of the two variables N base implant dose and P base implant dose; this determines the NPN base carrier concentration which turns out to provide good NPN characteristics. Low voltage NMOS source and drain implants employ a higher dose and may also be used for the high voltage NMOS source. The NPN emitter doping may also be used for a contact to the high voltage NMOS drain contact.
REFERENCES:
patent: 5119162 (1992-06-01), Todd et al.
patent: 5148255 (1992-09-01), Nakazato et al.
patent: 5169794 (1992-12-01), Iranmanesh
patent: 5216217 (1993-06-01), Takagi et al.
Church Michael David
Ito Akira
Harris Corporation
Tran Minh-Loan
Williams Alexander Oscor
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