BiCMOS device having self-aligned well tap and method of fabrica

Details BiCMOS device having self-aligned well tap and method of fabrica BiCMOS device having self-aligned well tap and method of fabrica

1990-04-02

1992-01-07

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 34, 437 59, H01L 2176

Patent

active

050791826

ABSTRACT:
A well tap for a field effect device formed using a single polysilicon process and a silicide layer is provided. The polysilicon layer which makes contact to the well is doped the same way as the well but is doped opposite of the source or drain. The silicide layer is formed on the upper and sidewall surfaces of the source or drain, well tap, and gate contacts for a field effect device. The silicide layer extends from the sidewall silicide across the upper surface of the transistors and up to the sidewall oxide of the transistor gates. The structure makes it possible to eliminate laterally-spaced separate well taps used in previous devices. Elimination of the laterally-spaced well taps permits hgher packing density, and lowers buried layer-to-substrate capacitance.

REFERENCES:
patent: 3955269 (1976-05-01), Magdo et al.
patent: 4374700 (1983-02-01), Scott et al.
patent: 4484388 (1984-11-01), Iwasaki
patent: 4507847 (1985-04-01), Sullivan
patent: 4536945 (1985-08-01), Gray et al.
patent: 4609568 (1986-09-01), Koh et al.
patent: 4677735 (1987-07-01), Malhi
patent: 4764480 (1988-08-01), Vora
patent: 4795722 (1989-01-01), Welch et al.
patent: 4829025 (1989-05-01), Iranmanesh
patent: 4897364 (1990-01-01), Nguyen
Brassington et al., "An Advanced Single-Level Polysilicon Submicrometer BiCMOS Technology," IEEE Trans. Elect. Devices.
Momose et al., "1 .mu.m n-well CMOS/Bipolar Technology," IEDM Transactions (Feb. 1985), p. 217.
Kapoor et al., "A High Speed High Density Single-Poly ECL Technology for Linear/Digital Applications" 1985 Custom Integrated Circuits Conference.
Gomi et al., "A Sub-30psec Si Bipolar LSI Technology" IEDM Technical Digest (1988), pp. 744-747.
Takemura et al., "BSA Technology for Sub-100mn Deep Base Bipolar Transistors" IEDM Technical Digest (1987), pp. 375-377.
Chiu et al., "A Bird's Beak Free Local Oxidation Technology Feasible to VSLI Circuits Fabrication" IEEE Transactions on Electron Devices, vol. ED-29, No. 4, pp. 536-540, Apr. 1982.

Affiliated with

Also associated with

Rating

BiCMOS device having self-aligned well tap and method of fabrica does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with BiCMOS device having self-aligned well tap and method of fabrica, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and BiCMOS device having self-aligned well tap and method of fabrica will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-822085