BiCMOS buffer circuit

Details BiCMOS buffer circuit BiCMOS buffer circuit

1994-01-03

1995-07-04

Westin, Edward P.

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Bipolar and fet

326109, H03K 1920

Patent

active

054303982

ABSTRACT:
A BiCMOS non-inverting buffer circuit (40) with small fan-in capacitance and excellent bipolar output drive. The circuit is ideal for buffering CMOS logic gates from excessive fan-out loads. The circuit also is less complex and more silicon efficient than present buffer circuit implementations, it provides improved transient saturation charge clamping and one buffer macro in an ASIC library can provide extended drive capability to all CMOS logic gates in the library.

REFERENCES:
patent: 4902914 (1990-02-01), Masuoka
patent: 5138195 (1992-08-01), Satou
patent: 5243237 (1993-09-01), Khieu
patent: 5254885 (1993-10-01), Ando
Yano, et al., "Quasi-Complementary BiCMOS for Sub-3-V Digital Circuits", IEEE Journal of Solid-State Circuits, vol. 26, No. 11, Nov. 1991, pp. 1708-1719.

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