BiCDMOS structure

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257372, 257338, 257577, H01L 29784, H01L 2970, H01L 2973

Patent

active

054225086

ABSTRACT:
A process is disclosed which simultaneously forms high quality complementary bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS transistors, zener diodes and thin-film resistors, or any desired combination of these, all on the same integrated circuit chip. The process uses a small number of masking steps, forms high performance transistor structures, and results in a high yield of functioning die. Isolation structures, bipolar transistor structures, CMOS transistor structures, DMOS transistor structures, zener diode structures, and thin-film resistor structures are also disclosed.

REFERENCES:
patent: 4119440 (1978-10-01), Hile
patent: 4481706 (1984-11-01), Roche
patent: 4590664 (1986-05-01), Prentice et al.
patent: 4601760 (1986-07-01), Hemmah et al.
patent: 4628341 (1986-12-01), Thomas
patent: 4795716 (1989-01-01), Yilmaz et al.
patent: 4826780 (1989-05-01), Takemoto et al.
patent: 4855244 (1989-08-01), Hutter et al.
patent: 4887142 (1989-12-01), Bertotti et al.
patent: 5091760 (1992-02-01), Maeda et al.
patent: 5156989 (1992-10-01), Williams et al.
patent: 5179432 (1993-01-01), Husher
patent: 5243214 (1993-09-01), Sin et al.
patent: 5260228 (1993-11-01), Taguchi
patent: 5262345 (1993-11-01), Nasser
Otto H. Schade, Jr. et al., "CMOS IIE: A Deep Drain-Extension Implant Technology For Analog/Digital ICs", RCA Review, vol. 47, Sep. 1986, pp. 398-428.
T. Kikkawa et al., "A New Complementary Transistor Structure For Analog Integrated Circuits", IEDM Conference Proceedings, 1980, pp. 65-68.
M. Nanba et al., "An Analytical and Experimental Investigation of the Cutoff Frequency f.sub.T of High-Speed Bipolar Transistors", IEEE Transactions on Electron Devices, vol. 35, No. 7, Jul. 1988, pp. 1021-1028.
K. Nakazato et al., "A 3GHz Lateral PNP Transistor", IEDM Conference Proceedings, 1986, pp. 416-419.
T. Ikeda et al., "Advanced BiCMOS Technology for High Speed VLSI", IEDM Conference Proceedings, 1986, pp. 408-411.
T. Matsushita et al., "Intelligent Power Device Having Large Immunity From Transients In Automotive Applications", Proceedings of 1990 International Symposium on Power Semiconductor Devices & ICs, pp. 79-80.
J. Sanchez et al., "Drain-Engineered Hot-Electron-Resistant Device Structures: A Review", IEEE Transactions on Electron Devices, vol. 36, No. 6, Jun. 1989, pp. 1125-1132.
H. Iwai et al., "0.8 .mu.m Bi-CMOS Technology With High f.sub.T Ion-Implanted Emitter Bipolar Transistor", IEDM Conference Proceedings, 1987, pp. 28-31.
I. Evans et al., "Optimization of Polysilicon Emitters for BiCMOS Transistor Design", IEEE Transactions on Electron Devices, vol. 37, No. 11, Nov. 1990, pp. 2343-2348.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

BiCDMOS structure does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with BiCDMOS structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and BiCDMOS structure will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-989346

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.