Biasing circuit for use in a non-volatile memory device

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S185230

Reexamination Certificate

active

07149132

ABSTRACT:
A biasing circuit for use in a non-volatile memory device is coupled to the row decoder and to the column decoder to supply a first and at least a second biasing voltage for the word and bit lines, and includes a first voltage booster having a first input coupled to receive a supply voltage, a second input coupled to receive a reference voltage, and an output coupled to one of the row decoder and the column decoder to supply the first biasing voltage. A second voltage booster has a first input coupled to receive the supply voltage, a second input coupled to the output of the first voltage booster to receive the first biasing voltage, and an output coupled to the other of the row decoder and the column decoder to supply the second biasing voltage.

REFERENCES:
patent: 5075890 (1991-12-01), Itoh et al.
patent: 5077691 (1991-12-01), Haddad et al.
patent: 5267209 (1993-11-01), Yoshida
patent: 5303190 (1994-04-01), Pelley, III
patent: 5406524 (1995-04-01), Kawamura et al.
patent: 5414669 (1995-05-01), Tedrow et al.
patent: 5483486 (1996-01-01), Javanifard et al.
patent: 5602794 (1997-02-01), Javanifard et al.
patent: 5608677 (1997-03-01), Yoon et al.
patent: 5657271 (1997-08-01), Mori
patent: 5740109 (1998-04-01), Morton et al.
patent: 5781477 (1998-07-01), Rinerson et al.
patent: 5825046 (1998-10-01), Czubatyj et al.
patent: 5881000 (1999-03-01), Maeda
patent: 5991221 (1999-11-01), Ishikawa et al.
patent: 5999475 (1999-12-01), Futatsuya et al.
patent: 6128231 (2000-10-01), Chung
patent: 6128242 (2000-10-01), Banba et al.
patent: 6144589 (2000-11-01), Micheloni et al.
patent: 6166961 (2000-12-01), Lee et al.
patent: 6266276 (2001-07-01), Odani
patent: 6344995 (2002-02-01), Chen et al.
patent: 6456541 (2002-09-01), Tanzawa
patent: 6459643 (2002-10-01), Kondo et al.
patent: 6518830 (2003-02-01), Gariboldi et al.
patent: 6535425 (2003-03-01), Nawaki et al.
patent: 6535435 (2003-03-01), Tanaka et al.
patent: 1 296 712 (1972-11-01), None
patent: WO 01/45108 (2001-06-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Biasing circuit for use in a non-volatile memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Biasing circuit for use in a non-volatile memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Biasing circuit for use in a non-volatile memory device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3684537

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.