Biased control loop circuit for setting impedance of output...

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S030000, C326S090000, C710S108000, C710S120000, C327S108000

Reexamination Certificate

active

06424175

ABSTRACT:

FIELD
The present invention relates generally to closed loop control systems, and more specifically to locking mechanisms within closed loop control systems.
BACKGROUND OF THE INVENTION
Control loop circuits typically use feedback to produce a signal that closely resembles a different signal external to the control loop circuit. Typical control loop circuits can also be made to produce a signal that closely resembles a mathematical function of another signal. For the purposes of this description, the signal produced by the control loop circuit is referred to as the “produced signal,” and the signal that the control loop circuit attempts to replicate is referred to as the “external signal.” Typical control loop circuits create an error signal that represents the difference between the external signal and the produced signal, and then attempt to minimize the error signal by varying the produced signal. As the external signal varies, the control loop circuit changes the produced signal. The loop is said to be “locked” when the error signal is reduced to an acceptable level. Typical control systems maintain a residual error value on the error signal when locked.
In typical control systems, the residual error value can be positive or negative depending on the movement of the external signal. For example, in a control loop that attempts to track the amplitude of the external signal, when the external signal increases in amplitude, the produced signal increases in amplitude in an attempt to follow the amplitude of the external signal. In this case, when the loop is locked, the residual error is negative because the produced signal is less than the external signal. Also for example, when the external signal decreases in amplitude, the residual error present after the loop has locked is positive because the amplitude of the produced signal is greater than the amplitude of the external signal.
The behavior described above creates a situation in which the error signal can vary by an amount equal to twice the maximum residual error. This is because at some lock points, the residual error is a maximum negative value, and at other lock points, the residual error is a maximum positive value. For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a control loop mechanism that exhibits reduced residual error variations.


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Comer, D.T., et al., “A CMOS Voltage to Current Converter for Low-Voltage Applications”, This informtion is directly from Donald T. Comer's web site: http://www.ee.byu.edu/faculty/comerdt/publications.html, 13 p., (Feb. 11, 1997).
Filanovsky, I.M., “Voltage Reference Using Mutual Compensation of Mobility and Threshold Voltage Temperature Effects”, ISCAS 2000—IEEE International Symposium on Circuits and Systems, pp. V197-V200, (May 2000).
Haycock, M., et al., “A 2.5Gb/s Bidrectional Signaling Technology”, Hot Interconnects Symposium V, pp. 1-8, (Aug. 1997).
Lee, S., et al., “A Temperature and Supply-Voltage Insensitive CMOS Current Reference”, IEICE Trans. Electron, vol. E82-C, pp. 1562-1566, (Aug. 1999).

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