Bias generator circuit for low voltage applications

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

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Details

36518911, 36518908, G11C 1604

Patent

active

060469447

ABSTRACT:
A voltage bias generator circuit which uses a series of small transistors to form essentially a resistor ladder to produce a desired bias voltage at an intermediate node using the sizing of the transistors and the placement of the node. The output node is then connected to a first voltage level shifting circuit for shifting the voltage by at least 1 V.sub.T. The output of the first voltage level shifting circuit is then coupled to the second voltage level shifting circuit, which shifts it back down or up to the desired bias voltage.

REFERENCES:
patent: 5671179 (1997-09-01), Javanifard
patent: 5825236 (1998-10-01), Seevinck et al.
patent: 5841714 (1998-11-01), Sher et al.
"Dynamic Dielectric Protection For I/O Circuits Fabricated in a 2.5V CMOS Technology Interfacing to a 3.3V LVTTL Bus", John Connor et al., 1997 Symposium on VLSI Circuits Digest of Technical Papers.

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