Static information storage and retrieval – Systems using particular element – Ferroelectric
Reexamination Certificate
2000-08-31
2002-04-02
Nelms, David (Department: 2818)
Static information storage and retrieval
Systems using particular element
Ferroelectric
C365S149000
Reexamination Certificate
active
06366489
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to ferroelectric memory devices, and particularly to memory cells having ferroelectric-MOS capacitors and sensing architectures therefor.
BACKGROUND OF THE INVENTION
Ferroelectric materials are a class of materials that can be thought of as having electrical properties somewhat analogous to the magnetic properties of ferromagnetic materials. A uniaxial ferromagnetic material can be magnetized in one of two directions, and thereafter will retain a magnetic field in that direction even after the applied magnetic field is removed; similarly, a ferroelectric material can be “polarized” in either direction (by applying an electric field to it), and thereafter will retain an electric field in that direction, even after the applied electric field is removed.
Ferroelectric materials have been successfully integrated into integrated circuit processes, but this integration can have some drawbacks. Ferroelectric materials having sufficient thermal stability for integrated circuit processing often include incompatible metals that must be separated from a silicon substrate. Such ferroelectric materials also tend to be strong oxygen sources, increasing the risk of undesirable oxidation of adjacent materials. Additionally, ferroelectric materials generally can only withstand a finite number of polarization reversals before their performance degrades.
Ferroelectric memories exploit the properties of ferroelectric materials. These materials are useful in semiconductor memories as they have characteristics to provide a non-volatile memory function; after a ferroelectric material has been polarized in one direction, it will hold that polarization for an extended time without further power input. In contrast, dynamic random access memory (DRAM) requires periodic refresh to maintain its data value, thus losing its data value upon the removal of its power source.
Since the physics of ferroelectric memories are different from those of conventional memory types (such as typical DRAM, Static RAM, or floating gate memories), the sensing operation is correspondingly different. Similar to DRAM, which generally stores its data value as a charge in a capacitor, a typical ferroelectric memory may also store its data value in a capacitor. However, while DRAM sense a stored charge of the capacitor to determine the data value, ferroelectric memories sense the polarization of the capacitor dielectric.
Ferroelectric memories are commonly sensed by pumping charge into the ferroelectric capacitor. If this operation forces the ferroelectric material to change its state, this can be detected by monitoring the amount of charge that subsequently exits the capacitor. Note that this procedure may be a destructive read in that a reversal of polarity may occur as a result of the read operation, thus requiring the data to be rewritten to the memory cell. This cumbersome operation is not only undesirable from the standpoint of time needed to read and rewrite, but may require the use of more than one transistor, or even more than one capacitor. Also, as noted previously, the ferroelectric material has an upper limit on the number of times the polarity can be changed without degradation. Accordingly, such destructive reads reduce the useful life of the memory device.
At the microscopic scale, the ferroelectric material can be seen to be divided into domains. A domain is a volume within which the polarization of the material is uniform. Each domain can have only two stable polarization states. The magnitude of the polarization state of the bulk material is a composite of the individual domain polarization states.
FIG. 6
schematically shows a typical hysteresis curve for a ferroelectric material. When the applied electric field E is increased to a positive value E
1
, the polarization of the material will increase to a value P
1
. When the applied positive field is subsequently removed, the polarization will fall back to a positive “remanent polarization” value P
r
. In a similar manner, when the applied electric field is increased in the opposite direction, to a negative value −E
2
, the polarization of the material will go to a negative value −P
2
. When the applied negative field is subsequently removed, the polarization will fall back to a negative remanent polarization value −P
r
. Thus, the material can take either of two polarization states in the absence of an electric field, depending on how it has been affected by the previously applied field. For electrical circuit analysis, the polarization state of a ferroelectric film can be thought of in terms of surface charge density, i.e., as amount of charge per unit area (usually written as “&sgr;”).
FIG. 7
shows a simplified curve that demonstrates the expected behavior of a ferroelectric bi-state capacitor. The ferroelectric material will reach the extreme values shown during programming, but fall back to the standby state, as shown, after programming. When an increasingly strong electric field is applied to a ferroelectric material, more and more of the domains will change their state to line up with the applied field. The electric field seen by any one domain is affected by the polarization states of the other domains which are nearby. Consequently, a full reversal of polarization requires not only some threshold energy level, but also some delay as individual domains align. This is inconvenient for ferroelectric memories, since it limits the write speed of any such memory. Moreover, in memories that use a destructive read, this phenomenon is also an important constraint on read access time. This has been a problem with commercialization of ferroelectric memories, since it is highly desirable for ferroelectric memories to have access times approximately as fast as those for DRAM memories.
For the reasons stated above, and for other reasons stated below that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternate architecture and methods of operation of ferroelectric semiconductor memory devices.
SUMMARY OF THE INVENTION
The above-mentioned problems with memory devices and other problems are addressed by the present invention and will be understood by reading and studying the following specification.
Bi-state ferroelectric-MOS (FMOS) capacitors are described herein with specific reference to their use in ferroelectric memory cells. Bi-state ferroelectric memory cells have a bottom plate of a capacitor coupled to a first source/drain region of a pass transistor, a gate of the pass transistor coupled to a word line, and a second source/drain region of the pass transistor coupled to a bit line. The capacitor has a ferroelectric portion. A plate line is coupled to the top plate of the capacitor to facilitate programming of the polarization state of the ferroelectric portion of the capacitor. The polarization state of the ferroelectric portion of the capacitor causes a depletion or accumulation of electrons in the bottom plate of the capacitor, thus altering its capacitance value. The resulting capacitance value may be sensed without causing a polarization reversal of the ferroelectric portion of the capacitor. Accordingly, bi-state ferroelectric memory cells of the various embodiments function as non-volatile memory cells.
The capacitance value of each capacitor can be directly sensed without a significant change in the DC bias across each ferroelectric layer. These sensing operations can thus be carried out without disturbing the polarization state of the ferroelectric layer of the capacitor. Memory cells of the various embodiments thus assist in performing fast read operations using conventional DRAM-type sense architectures. Such structures further facilitate performing non-destructive read operations.
For one embodiment, the invention provides a memory cell. The memory cell includes a pass transistor. The pass transistor has a gate formed overlying a substrate, a first source/drain region formed in
Fogg Slifer & Polglaze, P.A.
Leffert Thomas W.
Micro)n Technology, Inc.
Nelms David
Tran M.
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