Bi-directional return register stack recovery from...

Details Bi-directional return register stack recovery from... Bi-directional return register stack recovery from...

2006-12-19

2006-12-19

Kim, Kenneth S. (Department: 2111)

Electrical computers and digital processing systems: processing

Processing control

Branching

C711S109000, C711S219000, C712S219000, C712S239000

Reexamination Certificate

active

07152153

ABSTRACT:
A Next Return Target Address stack to maintain return addresses for call and return operations. The invention accommodates both definite return addresses and speculative return address in a single stack. Return addresses are written into the stack and read out of the stack at an entry/exit register interior to the stack. The stack has a lower portion below the entry/exit register for maintaining both actual and speculative return addresses, and an upper portion above the entry/exit register for maintaining return addresses that have been speculatively popped out. A branch history register keeps an ongoing record of the most recent calls and returns. In the event of a pipeline flush, such as would be caused by a branch mispredict, the contents of the branch history register are examined to determine how to adjust the contents of the stack. One or more depth counters keep track of which contents in the branch history register are to be examined.

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patent: 5768576 (1998-06-01), Hoyt et al.
patent: 5867696 (1999-02-01), Okayama et al.
patent: 5964868 (1999-10-01), Gochman et al.
patent: 6253315 (2001-06-01), Yeh
patent: 6314514 (2001-11-01), McDonald

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