Bi-cmos integrated circuit device having buried region use in co

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257371, 257372, 257373, 257378, 257552, H01L 2702, H01L 2704, H01L 2712

Patent

active

053768167

ABSTRACT:
Disclosed herein is a Bi-CMOS IC which includes a semiconductor substrate of one conductivity type, a semiconductor layer of an opposite conductivity type formed on the substrate, a buried region of the opposite conductivity type formed between a first part of the semiconductor layer and the substrate and elongated under a second part of the semiconductor layer to form an elongated buried portion, a bipolar transistor formed in the first part by using the first part as a collector region thereof, a semiconductor region of the one conductivity type formed in the second part in contact with the elongated buried portion separately from the substrate, and an insulated gate transistor formed in the semiconductor region.

REFERENCES:
patent: 4975764 (1990-12-01), Hsu
patent: 5001366 (1991-03-01), Masuda et al.
patent: 5015594 (1991-05-01), Chu et al.

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