BI-CMOS integrated circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S369000, C257S370000, C257S371000, C257S372000, C257S377000, C257S378000

Reexamination Certificate

active

06249030

ABSTRACT:

The invention concerns a BI-CMOS process for manufacturing integrated circuits. BI-CMOS refers to a single integrated circuit containing the following structures: (a) bipolar junction transistors, (b) N-channel MOSFETs, and (c) P-channel MOSFETs.
BACKGROUND OF THE INVENTION
In general, bipolar junction transistors (BJTs) and field-effect transistors (FETs) are constructed using different fabrication steps. When both BJTs and FETs are to be fabricated on the same integrated circuit (IC), the fabrication process is generally referred to as BI-CMOS. (The term BI-CMOS is sometimes specifically restricted to a particular combination of BJTs and FETs, namely, BJTs and CMOS-type FETs. CMOS is an acronym for Complementary Metal Oxide Semiconductor).
In theory, the fabrication of BI-CMOS devices is straightforward. However, in practice, if one merely adds a BJT sequence of steps to an FET sequence, the resulting sequence contains a large number of total steps, many of which are redundant.
In IC fabrication generally, it is desirable to reduce the total number of processing steps.
OBJECTS OF THE INVENTION
It is an object of the invention to provide an improved sequence of processing steps for integrated circuits.
It is a further object to provide an improved BI-CMOS processing sequence.
SUMMARY OF THE INVENTION
In one form of the invention, a single processing step is used to fabricate structures for both FETs and BJTs in a BICMOS structure. For example, a single layer of polysilicon is used to form both emitters for BJTs and gates for FETs. As another example, a single drive-in step is used to (a) complete drive-in of N- and P-wells for FETs and (b) perform drive-in of a collector plug for a BJT.


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